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<title>HSUBPS—Packed Single-FP Horizontal Subtract </title></head>
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<h1>HSUBPS—Packed Single-FP Horizontal Subtract</h1>
<table>
<tr>
<th>Opcode/Instruction</th>
<th>Op/En</th>
<th>64/32-bit Mode</th>
<th>CPUID Feature Flag</th>
<th>Description</th></tr>
<tr>
<td>
<p>F2 0F 7D /<em>r</em></p>
<p>HSUBPS <em>xmm1,</em> <em>xmm2/m128</em></p></td>
<td>RM</td>
<td>V/V</td>
<td>SSE3</td>
<td>Horizontal subtract packed single-precision floating-point values from <em>xmm2/m128</em> to <em>xmm1</em>.</td></tr>
<tr>
<td>
<p>VEX.NDS.128.F2.0F.WIG 7D /r</p>
<p>VHSUBPS xmm1, xmm2, xmm3/m128</p></td>
<td>RVM</td>
<td>V/V</td>
<td>AVX</td>
<td>Horizontal subtract packed single-precision floating-point values from xmm2 and xmm3/mem.</td></tr>
<tr>
<td>VEX.NDS.256.F2.0F.WIG 7D /r VHSUBPS ymm1, ymm2, ymm3/m256</td>
<td>RVM</td>
<td>V/V</td>
<td>AVX</td>
<td>Horizontal subtract packed single-precision floating-point values from ymm2 and ymm3/mem.</td></tr></table>
<h3>Instruction Operand Encoding</h3>
<table>
<tr>
<td>Op/En</td>
<td>Operand 1</td>
<td>Operand 2</td>
<td>Operand 3</td>
<td>Operand 4</td></tr>
<tr>
<td>RM</td>
<td>ModRM:reg (r, w)</td>
<td>ModRM:r/m (r)</td>
<td>NA</td>
<td>NA</td></tr>
<tr>
<td>RVM</td>
<td>ModRM:reg (w)</td>
<td>VEX.vvvv (r)</td>
<td>ModRM:r/m (r)</td>
<td>NA</td></tr></table>
<h2>Description</h2>
<p>Subtracts the single-precision floating-point value in the second dword of the destination operand from the first dword of the destination operand and stores the result in the first dword of the destination operand.</p>
<p>Subtracts the single-precision floating-point value in the fourth dword of the destination operand from the third dword of the destination operand and stores the result in the second dword of the destination operand.</p>
<p>Subtracts the single-precision floating-point value in the second dword of the source operand from the first dword of the source operand and stores the result in the third dword of the destination operand.</p>
<p>Subtracts the single-precision floating-point value in the fourth dword of the source operand from the third dword of the source operand and stores the result in the fourth dword of the destination operand.</p>
<p>In 64-bit mode, use of the REX.R prefix permits this instruction to access additional registers (XMM8-XMM15).</p>
<p>See Figure 3-22 for HSUBPS; see Figure 3-23 for VHSUBPS.</p>
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<text y="331965.682214" x="231.7682" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="105.3559507">HSUBPS xmm1, xmm2/m128</text>
<text y="331986.195814" x="434.9262" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="24.0009">xmm2/</text>
<text y="331990.996314" x="177.186" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="28.9130842">[127:96]</text>
<text y="331990.996314" x="247.4638" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="24.4649174">[95:64]</text>
<text y="331990.996314" x="314.9665" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="24.4649174">[63:32]</text>
<text y="331990.996314" x="384.6892" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="20.0167506">[31:0]</text>
<text y="331995.796114" x="434.9262" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="20.0087503">m128</text>
<text y="332050.392114" x="434.927" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="21.7768166">xmm1</text>
<text y="332050.392514" x="177.186" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="28.9130842">[127:96]</text>
<text y="332050.392514" x="247.4638" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="24.4649174">[95:64]</text>
<text y="332050.392514" x="314.9665" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="24.4649174">[63:32]</text>
<text y="332050.392514" x="384.6892" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="20.0167506">[31:0]</text>
<text y="332109.243914" x="172.2558" style="font-size:7.273000pt" lengthAdjust="spacingAndGlyphs" textLength="40.008773">xmm2/m128</text>
<text y="332109.243914" x="240.3335" style="font-size:7.273000pt" lengthAdjust="spacingAndGlyphs" textLength="40.008773">xmm2/m128</text>
<text y="332113.863814" x="434.9262" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="32.3052114">RESULT:</text>
<text y="332114.044214" x="304.6961" style="font-size:7.273000pt" lengthAdjust="spacingAndGlyphs" textLength="46.481743">xmm1[95:64] -</text>
<text y="332114.044214" x="374.1588" style="font-size:7.273000pt" lengthAdjust="spacingAndGlyphs" textLength="42.437955">xmm1[31:0] -</text>
<text y="332118.844314" x="167.1654" style="font-size:7.273000pt" lengthAdjust="spacingAndGlyphs" textLength="50.525531">[95:64] - xmm2/</text>
<text y="332118.844314" x="237.2032" style="font-size:7.273000pt" lengthAdjust="spacingAndGlyphs" textLength="46.481743">[31:0] - xmm2/</text>
<text y="332123.464114" x="434.9262" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="21.7768166">xmm1</text>
<text y="332123.644614" x="304.8961" style="font-size:7.273000pt" lengthAdjust="spacingAndGlyphs" textLength="46.081728">xmm1[127:96]</text>
<text y="332123.644614" x="374.3486" style="font-size:7.273000pt" lengthAdjust="spacingAndGlyphs" textLength="42.03794">xmm1[63:32]</text>
<text y="332128.444614" x="170.0855" style="font-size:7.273000pt" lengthAdjust="spacingAndGlyphs" textLength="44.474395">m128[127:96]</text>
<text y="332128.444614" x="240.1233" style="font-size:7.273000pt" lengthAdjust="spacingAndGlyphs" textLength="40.430607">m128[63:32]</text>
<text y="332153.052814" x="177.7412" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="28.9130842">[127:96]</text>
<text y="332153.052814" x="247.47421489" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="24.4649174">[95:64]</text>
<text y="332153.052814" x="310.4767" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="24.4649174">[63:32]</text>
<text y="332153.052814" x="389.199652" style="font-size:8.000300pt" lengthAdjust="spacingAndGlyphs" textLength="20.0167506">[31:0]</text>
<text y="332178.061009" x="456.9561" style="font-size:6.000100pt" lengthAdjust="spacingAndGlyphs" textLength="26.3464391">OM15996</text>
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<h3>Figure 3-22.  HSUBPS—Packed Single-FP Horizontal Subtract</h3>
<p>X7</p>
<p>X6</p>
<p>X5</p>
<p>X4</p>
<p>X3</p>
<p>X2</p>
<p>X1</p>
<p>X0</p>
<p>SRC1</p>
<p>Y7</p>
<p>Y6</p>
<p>Y5</p>
<p>Y4</p>
<p>Y3</p>
<p>Y2</p>
<p>Y1</p>
<p>Y0</p>
<p>SRC2</p>
<p>DEST</p>
<p>Y6-Y7</p>
<p>Y4-Y5</p>
<p>X6-X7</p>
<p>X4-X5</p>
<p>Y2-Y3</p>
<p>Y0-Y1</p>
<p>X2-X3</p>
<p>X0-X1</p>
<h3>Figure 3-23.  VHSUBPS operation</h3>
<p>128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The desti-nation is not distinct from the first source XMM register and the upper bits (VLMAX-1:128) of the corresponding YMM register destination are unmodified.</p>
<p>VEX.128 encoded version: the first source operand is an XMM register or 128-bit memory location. The destination operand is an XMM register. The upper bits (VLMAX-1:128) of the corresponding YMM register destination are zeroed.</p>
<p>VEX.256 encoded version: The first source operand is a YMM register. The second source operand can be a YMM register or a 256-bit memory location. The destination operand is a YMM register.</p>
<h2>Operation</h2>
<p><strong>HSUBPS (128-bit Legacy SSE version)</strong></p>
<pre>DEST[31:0] (cid:197) SRC1[31:0] - SRC1[63:32]
DEST[63:32] (cid:197) SRC1[95:64] - SRC1[127:96]
DEST[95:64] (cid:197) SRC2[31:0] - SRC2[63:32]
DEST[127:96] (cid:197) SRC2[95:64] - SRC2[127:96]
DEST[VLMAX-1:128] (Unmodified)</pre>
<p><strong>VHSUBPS (VEX.128 encoded version)</strong></p>
<pre>DEST[31:0] (cid:197) SRC1[31:0] - SRC1[63:32]
DEST[63:32] (cid:197) SRC1[95:64] - SRC1[127:96]
DEST[95:64] (cid:197) SRC2[31:0] - SRC2[63:32]
DEST[127:96] (cid:197) SRC2[95:64] - SRC2[127:96]
DEST[VLMAX-1:128] (cid:197) 0</pre>
<p><strong>VHSUBPS (VEX.256 encoded version)</strong></p>
<pre>DEST[31:0] (cid:197) SRC1[31:0] - SRC1[63:32]
DEST[63:32] (cid:197) SRC1[95:64] - SRC1[127:96]
DEST[95:64] (cid:197) SRC2[31:0] - SRC2[63:32]
DEST[127:96] (cid:197) SRC2[95:64] - SRC2[127:96]
DEST[159:128] (cid:197) SRC1[159:128] - SRC1[191:160]
DEST[191:160] (cid:197) SRC1[223:192] - SRC1[255:224]
DEST[223:192] (cid:197) SRC2[159:128] - SRC2[191:160]
DEST[255:224] (cid:197) SRC2[223:192] - SRC2[255:224]</pre>
<h2>Intel C/C++ Compiler Intrinsic Equivalent</h2>
<p>HSUBPS:</p>
<p>__m128 _mm_hsub_ps(__m128 a, __m128 b);</p>
<p>VHSUBPS:</p>
<p>__m256 _mm256_hsub_ps (__m256 a, __m256 b);</p>
<h2>Exceptions</h2>
<p>When the source operand is a memory operand, the operand must be aligned on a 16-byte boundary or a general-protection exception (#GP) will be generated.</p>
<h2>Numeric Exceptions</h2>
<p>Overflow, Underflow, Invalid, Precision, Denormal</p>
<h2>Other Exceptions</h2>
<p>See Exceptions Type 2.</p></body></html>